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Paper title: DIGITAL CIRCUIT FOR THE AVERAGING OF THE PULSE PERIODS

Author(s): DJURDJE PERIŠIĆ, ALEKSANDAR ŽORIĆ, ŽELJKO GAVRIĆ, NEDJO DANILOVIĆ,

Abstract:

This paper describes a practical realization and application of a period averaging circuit based on Frequency locked loop (FLL). It possesses powerful functional performances for the averaging of the pulse rate periods which can be either non-uniform or even extremely deranged. The realization of all digital version, using standard digital integrated circuit is presented. The important parameters of the circuit and limitations in its realization are discussed. Some of the possible applications are described and demonstrated on the realized model. Beside the averaging applications, the circuit can be used for the recovering of the lost pulses, as well as for the extracting of the undesirable pulses in a pulse rate. It also can be used for the frequency additions and subtractions and for wide range of applications in the frequency based circuits and systems. Beside the realization by standard digital circuits, this circuit is realized by the professional software package for electronic circuits “Multisim”. The voltage waveforms from the both realized versions are used for the presentation of the circuit application abilities.

Keywords: Averaging circuit, Digital circuit, Frequency locked loop, Phase locked loop

Year: 2018 | Tome: 63 | Issue: 3 | Pp.: 300-305

Full text : PDF (585 KB)