Paper title: LOW VOLTAGE CHARGE PUMP CIRCUIT USING 0.18 μM CMOS TECHNOLOGY
Author(s): KANG CHENG WEI, MD SYEDUL AMIN, MAMUN BIN IBNE REAZ, LABONNAH FARZANA RAHMAN, JUBAYER JALIL,
Abstract: An enhanced charge pump circuit utilizing charge-transfer-switch (CTS) to direct
charge flow with improved voltage pumping gain is proposed in this paper. The diodeconfigured
output stage limitation is managed through the pumping of output stage by
the clock of improved charge pump circuit. Using Mentor Graphics, the proposed
charge pump circuit is designed in 0.18 μm CMOS process. It is able to pump an input
voltage of 1.8 V to a measured output of 5.95 V through 20MHz clock signal with each
pumping capacitor of 0.1 pF and smoothing capacitor of 0.1 pF at the output. From the
simulation result, it is evident that the proposed charged pump circuit offers higher
pumping gain compared with the existing charge pump circuit. Besides, using in Non-
Volatile Memory (NVM), proposed design can be used in low voltage memory circuits.
Keywords: Charge pump, CMOS, EEPROM, NVM Year: 2013 | Tome: 58 | Issue: 1 | Pp.: 83-92
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