The dedicated application of the pseudo-MOS transistor is the SOI materials electrical characterization, with the advantage of a nondestructive technique. Also, the pseudo- MOS transistor is an excellent tool for new tests revealed in the SOI devices development. This paper presents an infrequent work regime, encountered in some special biases conditions of the pseudo-MOS transistor. Whether the gate voltage is applied so that the SOI film begins to be depleted, before the inversion onset, a continuous source-drain neutral channel exists at the upper part of the film. The drain current is depending on the drain-source voltage and simultaneously is modulated by the gate action. Consequently, this work regime is a JFET-like behavior. The paper brings some original arguments to highlight this particular work regime.

Keywords: SOI, Semiconductor Devices, FETs, Poisson's equation