This paper presents the analysis of CMOS re-configurable multi-standard radio receivers building blocks core. The paper’s main goal is to determine the building blocks key parameters, like gain, noise figure (NF) and third order intercept point (IP3) and to link them to the receiver overall performance. An overview of existing circuit topologies is presented. The analysis emphasizes the solutions that fit best a true re-configurable multi-standard implementation.

Keywords: Software defined radio, Direct conversion receiver, Low noise amplifier, Negative feedback amplifier, Noise-linearity trade-off